Silicon manufacturers are up against real physical barriers in the way silicon is implemented today.
Their only choice today is to look at more and more materials available in the Periodic Table and use it to scale CMOS chips to 22-nm, 15-nm and beyond.
“Foundries have traditionally been focused on the manufacturing and scaling of the technology from the lithography standpoint but going forward we just can’t scale the gate-oxyde any further…
We’re doing strained silicon, we’re moving to High-K Metal Gate, we see FinFET as the technology going forward. From a Chartered perspective we would have been very hard pressed to invest in this kind of material science and apply it the way IBM has”, admits Kevin Meyer, VP at Chartered Semiconductor during his presentation at the ARM Developer’s Conference.
On the “wiring” side, Chartered/IBM will be moving to “Airgap“, replacing aluminum and copper but dismissed by Intel as too costly.
